1. Field of the Invention
The present invention relates to a pulse generator and the method for pulse generation thereof, more particularly to a pulse generator and the method for generating pulses with adjustable pulse widths.
2. Description of the Related Art
Pulse generator circuits are commonly used in integrated circuit applications for generating electrical pulse signals that are triggered as a result of an input clock signal. Referring to FIG. 1, a traditional pulse generator 1 comprises a delay unit 12 and a NAND gate 11, where the delay unit 12 is intended to invert and delay an input signal Pin as Pd by a certain internal time, and the NAND gate 11 receives the input signal Pin and the delayed signal Pd and then outputs an output signal Pout through a NAND operation. A symbol “  ” put at a head of the signal name means a negative logic signal.
The structure of the delay unit 12 may be configured as shown in FIG. 2(a) or FIG. 2(b). Referring to FIG. 2(a), odd number of inverters INV are connected in series to form a delay unit 12. Referring to FIG. 2(b), odd number of pairs with combinations of an inverter INV and a resistor R are connected in series to form as an alternative. FIG. 3 shows a timing chart of the input signal Pin, the delayed signal Pd, and the output signal Pout. The pulse width of the output signal Pout depends on the number of the inverters INV of the delay unit 12, and once a delay unit 12 of FIG. 2(a) or FIG. 2(b) is constructed in the traditional pulse generator 1, the pulse width of the output signal Pout is fixed. FIG. 3 also shows the traditional pulse generator 1 operating at the rising edge of the input signal Pin. If input signal's falling edge operation is required for the traditional pulse generator 1, the NAND gate 11 in FIG. 1 could be replaced with a NOR gate.
U.S. Pat. No. 6,121,803 discloses a pulse generator according to the source voltage Vcc from 0V to 3V (or 5V) to reliably generate the pulse signal according to power on or the reset of the power. However, the pulse width changes when the slew rate of Vcc is not well controlled. Also the time required to boost the source voltage Vcc from 0V to 3V (or 5V) is in the order of a microsecond or above, which is not suitable for the applications operated with the pulse width below a microsecond. The prior arts mentioned above need many inverters or many transistors to generate pulses with desired width, which thus increases the circuit complexity and cost.